Senior ASIC Test Engineer (m/f/d) for AUMOVIO ASICs is responsible for defining and implementing the top-level ATE test concept based on analog and digital test concepts. In close collaboration with design and design-for-test teams, you will develop an ATE test concept and test programs for the ASIC that can be used and refined for series production as the project moves from development to production. Responsibilities include defining, developing and maintaining ATE test programs for wafer test and final test; debugging hardware/software test issues and improving test stability; supporting production ramp, safelaunch, and sustaining activities; acting as a technical expert and sparring partner for global design, DFT, and product engineering teams; architecting and developing scalable ATE test concepts and test flows for wafer sort and final test; taking ownership of the validation strategy for implemented test functionalities and driving cross-platform consistency; ensuring alignment and correlation of test results between bench and ATE to ensure high measurement accuracy and data integrity; taking full responsibility for silicon characterization across process, voltage, and temperature (PVT) to validate new product features; setting up and maintaining comprehensive technical documentation for test concepts, test programs, and procedures; releasing ATE test solutions to manufacturing and supporting ongoing production quality related to test coverage. Qualifications include an academic degree in Electrical Engineering, Microelectronics, Physics, or a related field; several y

Senior ASIC Test Engineer (m/f/d) for AUMOVIO ASICs is responsible for defining and implementing the top-level ATE test concept based on analog and digital test concepts. In close collaboration with design and design-for-test teams, you will develop an ATE test concept and test programs for the ASIC that can be used and refined for series production as the project moves from development to production. Responsibilities include defining, developing and maintaining ATE test programs for wafer test and final test; debugging hardware/software test issues and improving test stability; supporting production ramp, safelaunch, and sustaining activities; acting as a technical expert and sparring partner for global design, DFT, and product engineering teams; architecting and developing scalable ATE test concepts and test flows for wafer sort and final test; taking ownership of the validation strategy for implemented test functionalities and driving cross-platform consistency; ensuring alignment and correlation of test results between bench and ATE to ensure high measurement accuracy and data integrity; taking full responsibility for silicon characterization across process, voltage, and temperature (PVT) to validate new product features; setting up and maintaining comprehensive technical documentation for test concepts, test programs, and procedures; releasing ATE test solutions to manufacturing and supporting ongoing production quality related to test coverage. Qualifications include an academic degree in Electrical Engineering, Microelectronics, Physics, or a related field; several y