Apple is seeking an early-career CAD Automation Engineer (Design Verification) to join the CAD Hardware Tech team. The role involves delivering high-quality infrastructure to automate chip design processes and optimizing the performance of large-scale simulations to reduce compute time and resource usage. You will collaborate with vendor and internal teams to develop and deploy new methodologies and to support and debug issues on large-scale simulations. This is an on-site position in the United Kingdom with opportunities in London, Cambridge, or St Albans. Minimum qualifications include a BS, MS, or PhD in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, Computer Science, Software Engineering, or a related field; experience with RTL simulation tools; Linux foundations and grid computing; scripting in Python or Perl; strong analytical and interpersonal skills; and ability to work effectively in a team. Preferred qualifications include familiarity with the Cadence tool chain; SystemVerilog/Verilog/VHDL; and curiosity about GPU/PMU/CPU/SOC architecture.

Apple is seeking an early-career CAD Automation Engineer (Design Verification) to join the CAD Hardware Tech team. The role involves delivering high-quality infrastructure to automate chip design processes and optimizing the performance of large-scale simulations to reduce compute time and resource usage. You will collaborate with vendor and internal teams to develop and deploy new methodologies and to support and debug issues on large-scale simulations. This is an on-site position in the United Kingdom with opportunities in London, Cambridge, or St Albans. Minimum qualifications include a BS, MS, or PhD in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, Computer Science, Software Engineering, or a related field; experience with RTL simulation tools; Linux foundations and grid computing; scripting in Python or Perl; strong analytical and interpersonal skills; and ability to work effectively in a team. Preferred qualifications include familiarity with the Cadence tool chain; SystemVerilog/Verilog/VHDL; and curiosity about GPU/PMU/CPU/SOC architecture.